Coss Measurements for Superjunction MOSFETs: Limitations and Opportunities

Abstract

Small-signal measurements of output capacitance (C OSS ) are ubiquitous in power semiconductor datasheets and determine critical features of power converters. For silicon superjunction power MOSFETs (SJs), we report C OSS measurements with two key anomalies: variation with ac perturbation frequency and hysteresis with dc sweep direction. Using mixed-mode simulations, we attribute the frequency shift to the fundamental SJ structure and find that dc hysteresis is caused by charge trapping from uneven depletion fronts. We show that C OSS measurements on SJs do not accurately characterize large-signal operation, underestimating stored energy by up to four times and giving no indication of C OSS losses.

Simulated depletion region (at 10 MHz) across VDS with positive- and negative-going dc bias at 0.5s-ramp rate.