A design methodology for class-D resonant rectifier with parallel LC tank

Conference
COMPEL
Author

S. Park and J. Rivas-Davila

Published

September 1, 2016

Doi
Abstract
This paper presents a design methodology for the tuning of a class-D half-wave resonant rectifier with a parallel LC resonant tank input network. Class-D resonant rectifiers offer numerous advantages at high operating frequencies that are leveraged here in the design of a high-voltage rectifier. The absence of a systematic design process, however, has been a limiting factor. Designers have been relying largely on parametric variation during transient simulation to design a rectifier with resistive input impedance at the fundamental frequency of operation. In this paper, we propose a systematic design procedure that begins with universal design curves applicable to any rectifier design of this topology. This is followed by parameter selection and a convergence check that ensures the rectifier operates with the desired output voltage. Experimental results confirm the validity of the design method for both linear and nonlinear resonant capacitances. Based on the outlined procedure, a 25 MHz 500 V rectifier with resistive input impedance is designed and experimentally verified.